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General information
contact@jcert.es | PGP Key : D96AF2303DC160E49785AEBD867361F0F303AD14
- Position: formal verification engineer @ Keysom
- Former positions:
- defensive security researcher @ IRIT lab - University of Toulouse
- hardware/software engineer @ BiBench Systems (CNES contractor)
- hardware engineer @ Dolphin Integration
[ English Resume | French CV ]
Research activities
- Formal verification of hardware/software architectures
- Design of hardware/software architectures
- Defensive security research
More information available here.
Education
- (2023) Ph.D: Methods and models for formal verification of remote attestation on microprocessors - IRIT - University of Toulouse
- (2011) Master of Science (M.S.) specialized in electronics - University of Bordeaux
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